In the manufacture of semiconductor devices, it is often important to deposit a dielectric layer, such as a silicon dioxide or silicon nitride film, for the purpose of isolating metal contacts formed on an underlying substrate. Such isolation generally involves both filling the spaces between contacts, and covering the upper surfaces of the contacts, with dielectric material. Furthermore, it is often desirable for the layer to be so formed that the upper surface of the layer is planar over an extended region, irrespective of whether individual portions of the upper surface overlie metal contacts or the spaces between such contacts. The formation of such a dielectric layer having a planar upper surface is referred to as planarization.
Various processes are available for forming dielectric layers. However, only processes involving relatively low temperatures are useful for planarizing metal contacts. That is, metal contacts are typically made of aluminum. Aluminum contacts are intolerant of processing temperatures greater than about 400.degree. C. because at such temperatures, hillocks tend to form in aluminum films. Thus, for example, spin-on oxide formation is disadvantageous because good quality spin-on oxide films must be baked at about 900.degree. C. In instances where low-temperature baked spin-on oxide is used, a multilayer sandwich structure is required to protect the aluminum and to assure acceptable device performance. However, this approach adds cost and reduces manufacturing throughput.
Plasma deposition processes are of interest in this regard, because they are able to form dielectric layers of, e.g., silicon dioxide or silicon nitride, at relatively low temperatures. In particular, Electron Cyclotron Resonance (ECR) plasma reactors have been found to produce high-quality silicon dioxide and silicon nitride layers without heating the substrate to more than about 150.degree. C.
FIG. 1 illustrates the elements of an ECR plasma reactor as described, for example, in S. Matsuo and M. Kiuchi, "Low Temperature Chemical Vapor Deposition Method Utilizing an Electron Cyclotron Resonance Plasma," Japanese J. Appl. Phys. Lett. 22, pp. L210-L212 (1983). Microwave power flows into plasma chamber 10 through rectangular waveguide 20 and fused quartz window 30. Magnet coils 40 arranged around the plasma chamber produce the magnetic field (typically about 875 Gauss) that is required for ECR behavior at the microwave frequency used (which is typically about 2.45 GHz). The plasma chamber and magnets are cooled by water flowing through inlet 50 and outlet 55. Deposition gases are introduced separately through inlet 60 into the plasma chamber and through inlet 65 into reaction chamber 90. The reactor is evacuated through port 80. Below plasma chamber 10, as viewed in FIG. 1, is reaction chamber 90, within which are substrate holder 100 and substrate 110. Substrate 110 has at least one surface substantially facing plasma chamber 10 (i.e., upwards as viewed in FIG. 1). Between chamber 10 and chamber 90 is annular partition 115. Plasma is extracted from chamber 10 into chamber 90 by a divergent magnetic field method. That is, the magnetic field in chamber 90 gradually weakens along the direction from the plasma chamber to the specimen table. Circulating electrons are diffused rapidly toward the substrate by the magnetic field gradient, and as a consequence, an electrostatic field is created which accelerates ions along the plasma stream from the plasma chamber to the wafer. Ions and/or radicals in the plasma stream react with the deposition gas in the reaction chamber to form dielectric material adherent to the surface of the substrate.
Often, especially with regard to VLSI manufacturing, it is desired to planarize submicron interconnections having high aspect ratios, such as are used in VLSI manufacturing. Referring to FIG. 2, by "submicron" is meant that the distance between at least some pairs of neighboring metal contacts 200 is less than one micron. By "aspect ratio" is meant the height of a contact, divided by the spacing between the relevant contacts.
As material 210 is deposited, the upper surface of the deposited layer, tends, at least initially, to reproduce the topography of the underlying wafer. Accordingly, those portions of the upper dielectric surface that overlie contacts are here called "plateaus," and those portions lying between plateaus are here called "wells."
When a well is narrower than its depth, it is difficult to fill it uniformly. That is, the top tends to accumulate deposited material, growing shoulders that may eventually close off before the bottom is filled, leading to the formation of voids in the deposited material. The ability to fill a well uniformly, and thus to avoid the formation of voids, is strongly dependent on the angle of incidence of the ions that react to form the dielectric. The narrower the well, the more significant these problems become. Thus, aspect ratios of 1.0 and greater are regarded as "high." Because in an ECR plasma reactor the ions are vertically, or nearly vertically, incident on the substrate, ECR plasma reactors are particularly useful for processing submicron interconnections having high aspect ratios.
However, even with vertically incident ions in an ECR plasma reactor, the shoulders, i.e., the upper portions of facing sides of wells, may tend to grow together, closing up before the wells are filled. As a consequence, it is difficult to grow high quality planarizing layers even by this means.
When sputtering, e.g., oxygen or argon sputtering, takes place, however, the sputtering rate is angle-dependent. Thus, relatively high sputtering yield is obtained on those planes that lie at or near 45.degree. to the direction of the incident ions. As a consequence, the shoulders of the oxide profile can be eliminated with only a small loss in deposition rate. As a further consequence, voids are eliminated and an upper surface is produced that may have smaller peak-to-valley fluctuations than the underlying substrate, and in which the sides of the hills are sloping rather than abrupt. Eventually, even these hills can be eliminated and a planar upper surface achieved.
An ECR plasma deposition apparatus can be adapted for simultaneous sputter etching of the dielectric layer during deposition by incorporating means for applying an rf bias to the substrate during deposition, as described, for example, in K. Machida and H. Oikawa, "SiO.sub.2 Planarization Technology With Biasing and Electron Cyclotron Resonance Plasma Deposition for Submicron Interconnections," J. Vac. Sci. Technol. B 4 (4), pp. 818-821 (1986). Referring back to FIG. 1, the rf bias is generated by rf generator 120, and applied to specimen 110 through transmission line 140. Plasma deposition performed with an apparatus of this kind is referred to as bias ECR plasma deposition.
Thus, for example, Machida et al., U.S. Pat. No. 4,732,761 discusses the formation of silicon dioxide dielectric layers by bias ECR plasma deposition, using apparatus similar to that depicted in FIG. 1. The reactant materials were silane and oxygen. In addition, argon was injected into the reactor.
Although the method of forming a silicon dioxide dielectric layer by reacting silane and oxygen in a bias ECR reactor is useful, it suffers from certain disadvantages. That is, silane is a hazardous material and therefore relatively undesirable as a silicon-containing reactant. Moreover, relatively high microwave and rf power levels are required by this method, typically, about 2.8 kW microwave and about 1 kW rf, in order to achieve planarization and a commercially acceptable deposition rate. Operation at relatively high power levels is undesirable both because a proportionate amount of electricity is consumed and because the lifetime of the apparatus is decreased. Moreover, in order to provide a commercially acceptable deposition rate, e.g., about 5000 .ANG./minute, this method requires a high-pumping-speed vacuum system, which adds significant capital cost.